1. Field of the Invention
The present invention relates to a flash memory, and more particularly, to a self-test method of a flash memory device.
2. Description of the Prior Art
A flash memory can store data through operations of electronically erasing and writing/programming. The flash memory is widely applied to electronic products such as memory cards, solid-state drives (SSDs) and portable multimedia players. Since the flash memory is a non-volatile memory, it does not need additional power to keep the information stored therein. Further, the flash memory is capable of providing fast data read and better shock-resistive ability. Hence, based on at least the above characteristics, the reason why the flash memory is so popular can be explained.
Flash memories can be divided into NOR flash memories and NAND flash memories. The NAND flash memory has shorter erase and program time, and each memory cell thereof requires a smaller chip area. Hence, compared with the NOR flash memory, the NAND flash memory has higher storage density and lower cost per storage unit. In general, the flash memory utilizes memory cell arrays to store data bits. The memory cell is implemented by a floating-gate transistor, and each memory cell may set the required threshold voltage of turning on the floating-gate transistor through appropriately controlling the number of charges on the floating gate of the floating-gate transistor, to store the information of a single bit or multiple bits. In this way, when one or multiple predetermined control gate voltages are applied to the control gate of the floating gate transistor, the conduction state of the floating-gate transistor will indicate one or multiple binary digits stored in the gloating-gate transistor.
However, some factors might affect/disturb the number of charges originally stored in the flash memory cell. For example, the interference existing in the flash memory may come from the write/program disturbance, read disturbance and/or retention disturbance. Taking a NAND flash memory composed of memory cells each having more than one bit stored therein for example, a physical memory page includes multiple logical memory pages, and each of the logic memory pages utilizes one or multiple control gate voltages to perform a read operation. For example, regarding a flash memory cell used for storing 3-bit information, the flash memory cell will have one of 8 states (i.e., charge levels) respectively corresponding to different numbers of charges (i.e., different threshold voltages). However, due to the program/erase (P/E) count and/or data retention time, the threshold voltage distribution of the flash memory cell will change. Hence, reading information stored in the memory cell according to the original control gate voltage setting may not correctly obtain the stored information due to the change of the threshold voltage distribution.
The aforementioned change or shift of the threshold voltage distribution usually results in data read errors, and this problem can be improved by utilizing error correction code (ECC) and soft decoding. However, due to the reduction on the current manufacture process of the flash memories, it becomes easier to encounter errors during the procedure of soft recording preformed on data read from the flash memories. Hence, how to provide a low-cost and efficient testing method becomes an important issue in the pertinent field.